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Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
- CONTENTS REVISION HISTORY 1. GENERAL DESCRIPTION
1.1 OVERVIEW 1.2 FEATURES 1.3 APPLICATION 1.4 GENERAL SPECIFICATIONS 1.5 MECHANICAL SPECIFICATIONS -------------------------------------------------------------------------------------------------------------
3 4
2. ABSOLUTE www..com
MAXIMUM RATINGS
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2.1 ABSOLUTE RATINGS OF ENVIRONMENT 2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE 2.2.2 BACKLIGHT UNIT
3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE 3.2 BACKLIGHT UNIT
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4. BLOCK DIAGRAM
4.1 TFT LCD MODULE 4.2 BACKLIGHT UNIT
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5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE 5.2 BACKLIGHT UNIT 5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL 5.4 COLOR DATA INPUT ASSIGNMENT 5.5 EDID DATA STRUCTURE 5.6 EDID SIGNAL SPECIFICATION
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS 6.2 POWER ON/OFF SEQUENCE
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS 7.2 OPTICAL SPECIFICATIONS
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8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS 8.2 STORAGE PRECAUTIONS 8.3 OPERATION PRECAUTIONS
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9. PACKING
9.1 CARTON 9.2 PALLET
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10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL 10.2 CARTON LABEL
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
REVISION HISTORY
Version Ver 2.0 Date Jun. 06. `05 Page (New) All Section All Description Approval specification first issued.
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
1. GENERAL DESCRIPTION
1.1 OVERVIEW
N121X5 -L04 is a 12.1" TFT Liquid Crystal Display module with single CCFL Backlight unit and 20 pins LVDS interface. This module supports 1024 x 768 XGA mode and can display 262,144 colors. The optimum viewing angle is at 6 o'clock direction. The inverter module for Backlight is not built in.
1.2 FEATURES
- Thin and light weight
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- XGA (1024 x 768 pixels) resolution - DE (Data Enable) only mode - 3.3V LVDS (Low Voltage Differential Signaling) interface with 1 pixel/clock - Support EDID Structure Version 1 Revision 3
1.3 APPLICATION
- TFT LCD Notebook
1.4 GENERAL SPECIFICATI0NS
Item Active Area Bezel Opening Area Driver Element Pixel Number Pixel Pitch Pixel Arrangement Display Colors Transmissive Mode Surface Treatment Specification 245.76 (H) X 184.32 (V) 250.5 (H) x 188.9 (V) a-si TFT active matrix 1024 x R.G.B. x 768 0.24 (H) x 0.24 (V) RGB vertical stripe 262,144 Normally white Hard coating (3H), Anti-glare (Haze 25 %) Unit mm mm pixel mm color Note (1) -
1.5 MECHANICAL SPECIFICATIONS
Item Horizontal(H) Module Size Vertical(V) Depth(D) Weight Note (2) Connector mounting position Min. 260.5 197.5 --Typ. 261 198 4.7 240 Max. 261.5 198.5 5.0 255 Unit mm mm mm g Note (1) -
Note (1) Please refer to the attached drawings for more information of front and back outline dimensions.
+/- 0.5mm
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
2. ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Storage Temperature Operating Ambient Temperature Shock (Non-Operating) Vibration (Non-Operating) (a) 90 %RH Max. (Ta 40 C).
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Symbol TST TOP SNOP VNOP
Value Min. -20 0 Max. +60 +50 220 1.5
Unit C C G G
Note (1) (1), (2) (3), (5) (4), (5)
Note (1) Temperature and relative humidity range is shown in the figure below. (b) Wet-bulb temperature should be 39 C Max. (Ta > 40 C). (c) No condensation .
Relative Humidity (%RH)
100 90 80 60 40 20 5 -40 -20 0
Operating Range
Storage Range
20 40 60 80
Temperature (C)
Note (2) The temperature of panel surface should be 0 C Min. and 50 C Max. Note (3) 2ms, half sine wave, 1 time for X, Y, Z. Note (4) 10 ~ 200 Hz, 0.5 Hr / Cycle, 1 cycles for each X, Y, Z. The fixing condition is shown as below: At Room Temperature Side Mount Fixing Screw LCD Module Side Mount Fixing Screw Stage Gap=2mm Bracket
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid enough so that the module would not be twisted or bent by the fixture.
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Version 2.0
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2.2 ELECTRICAL ABSOLUTE RATINGS 2.2.1 TFT LCD MODULE
Item Power Supply Voltage Logic Input Voltage Symbol Vcc VIN Value Min. -0.3 -0.3 Max. +4.0 Vcc+0.3 Unit V V Note (1)
2.2.2 BACKLIGHT UNIT
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Item
Symbol VL IL FL
Value Min. Max. 2.5K 6.5 80
Unit VRMS mARMS KHz
Note (1), (2), IL = 6.0 mA (1), (2)
Lamp Voltage Lamp Current Lamp Frequency
Note (1) Permanent damage to the device may occur if maximum values are exceeded. Function operation should be restricted to the conditions described under Normal Operating Conditions. Note (2) Specified values are for lamp (Refer to Section 3.2 for further information).
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Parameter Power Supply Voltage Ripple Voltage Rush Current White Black www..com Differential Input Voltage for "H" Level LVDS Receiver Threshold "L" Level Terminating Resistor Power Supply Current Note (2) Measurement Conditions:
+3.3V Q 1 FUSE R1 47K F (High to Low) (Control Signal) R2 SW 1K +12V 47K 2SK1475 Vcc C3 (LCD Module Input) 1u
Ta = 25 2 C Symbol Vcc VRP IRUSH lcc VIH VIL RT Min. 3.0 -100 Value Typ. 3.3 230 280 100 Max. 3.6 100 1.5 270 330 +100 Unit V mV A mA mA mV mV Ohm Note (2) (3)a (3)b -
Note (1) The module should be always operated within above ranges.
Q 2SK1470 2
VR1 C1
C 2 0.01uF
1uF
Vcc rising time is 470us
+3.3V
0.9Vcc 0.1Vcc
GND 470us
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
Note (3) The specified power supply current is under the conditions at Vcc = 3.3 V, Ta = 25 2 C, DC Current and fv = 60 Hz, whereas a power dissipation check pattern below is displayed. a. White Pattern b. Black Pattern
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Active Area
Active Area
3.2 BACKLIGHT UNIT
Parameter Lamp Input Voltage Lamp Current Lamp Turn On Voltage Operating Frequency Power Consumption Lamp Life Time Symbol VL IL VS FL PL LBL Min. 540 3.0 45 10,000 Value Typ. 600 5.0 3.0 Max. 660 6.0 1170 (25 oC) 1340 (0 oC) 80 Unit VRMS mARMS VRMS VRMS KHz W Hrs
Ta = 25 2 C Note IL = 5.0 mA (1),(7) (2) (2) (3) (4), IL = 5.0 mA (5)
Note (1) Lamp current is measured by utilizing a high frequency current meter as shown below: HV (White)
LCD Module
1 2
LV (Black)
Inverter
A Current Meter
Note (2) The voltage shown above should be applied to the lamp for more than 1 second after startup. Otherwise the lamp may not be turned on.
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Version 2.0
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Note (3) The lamp frequency may generate interference with horizontal synchronous frequency from the display, and this may cause line flow on the display. In order to avoid interference, the lamp frequency should be detached from the horizontal synchronous frequency and its harmonics as far as possible. Note (4) PL = IL xVL Note (5) The lifetime of lamp is defined as the time when it continues to operate under the conditions at Ta = 25 2 oC and IL = 6.0mARMS until one of the following events occurs: (a) When the brightness becomes 50% of its original value.
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(b) When the effective ignition length becomes 80% of its original value. (Effective ignition length is defined as an area that the brightness is less than 70% compared to the center point.)
Note (6) The waveform of the voltage output of inverter must be area-symmetric and the design of the inverter must have specifications for the modularized lamp. The performance of the Backlight, such as lifetime or brightness, is greatly influenced by the characteristics of the DC-AC inverter for the lamp. All the parameters of an inverter should be carefully designed to avoid generating too much current leakage from high voltage output of the inverter. When designing or ordering the inverter please make sure that a poor lighting caused by the mismatch of the Backlight and the inverter (miss-lighting, flicker, etc.) never occurs. If the above situation is confirmed, the module should be operated in the same manners when it is installed in your instrument. The output of the inverter must have symmetrical (negative and positive) voltage waveform and symmetrical current waveform.(Unsymmetrical ratio is less than 10%) Please do not use the inverter, which has unsymmetrical voltage and unsymmetrical current and spike wave. Lamp frequency may produce interface with horizontal synchronous frequency and as a result this may cause beat on the display. Therefore lamp frequency shall be as away possible from the horizontal synchronous frequency and from its harmonics in order to prevent interference. Requirements for a system inverter design, which is intended to have a better display performance, a better power efficiency and a more reliable lamp. It shall help increase the lamp lifetime and reduce its leakage current. a. The asymmetry rate of the inverter waveform should be 10% below; b. The distortion rate of the waveform should be within 2 10%; c. The ideal sine wave form shall be symmetric in positive and negative polarities.
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
* Asymmetry rate:
Ip I -p
| I p - I -p | / Irms * 100% * Distortion rate I p (or I -p) / Irms
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Note (7) The lamp leakage current is measured by the current difference between in and out. And the measurement condition is as below:
LCD Module
FG Low High
Lamp
Current Probe ILow Current Probe
Inverter
GND
IHigh
ILeak(RMS) = IHigh(RMS) - ILow(RMS)
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
Note (8) About operating current min 2.0mA , lamp maker has some advice as below
(Reference) Light quantity adjustment method
Explanation and comparison of the kind of tone light: Lamp current wave-like by the adjustment of the current.
P-P LEVEL DOWN
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Tone light
Lamp current wave-like by the adjustment of the burst.
P-P LEVEL =
OFF:20%
ON:80%
Comparative table Method current burst Backlight efficiency (INVLAMP) Good ( 75 % 85% ) Bad ( 65 % 75% ) Tone light rate (%) 58 10 Circuitry Complicated Easy
Method of case that Lamp current MIN2.0mA is controlled. It is the setting of minimum 2.0mA (MIN) to Lamp current 6.0mA in the lamp specification. The burst is excellent for circuitry. The marker proposes that pays attention to the following contents.
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
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The attention point of the light with a touch of the burst: Do not to be SPARK at start.
NG
SPARK
GOOD
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PWM frequency does so that the frequency that is not able to divide the fixed number time, fixed number to lamp drive frequency is selected. (It is due to resonance noise occurrence prevention. ) Even the frequency that is using it for LCD avoids selecting it.
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
4. BLOCK DIAGRAM
4.1 TFT LCD MODULE
Rxin0(+/-)
SCAN DRIVER IC
Rxin1(+/-)
Rxin2(+/-) CLK(+/-) Vcc
LVDS INPUT / TIMING CONTROLLER
INPUT CONNECTOR (HIROSE DF19L-20P-1H)
TFT LCD PANEL (1024xR.G.B.x768)
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DataEDID CLKEDID VEDID
DC/DC CONVERTER & REFERENCE VOLTAGE GENERATOR EDID EEPROM
DATA DRIVER IC
VL
LAMP CONNECTOR (JST-BHSR-02VS-1)
BACKLIGHT UNIT
4.2 BACKLIGHT UNIT
1 HV (White) 2 LV (Black)
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
5. INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Symbol Vss Vcc Vcc VEDID NC CLKEDID DATAEDID Rxin0Rxin0+ Vss Rxin1Rxin1+ Vss Rxin2Rxin2+ Vss CLKCLK+ Vss Vss Description Ground Power Supply +3.3 V (typical) Power Supply +3.3 V (typical) DDC 3.3V Power Non-Connection DDC Clock DDC Data LVDS Differential Data Input LVDS Differential Data Input Ground LVDS Differential Data Input LVDS Differential Data Input Ground LVDS Differential Data Input LVDS Differential Data Input Ground LVDS Clock Data Input LVDS Clock Data Input Ground Ground Polarity Remark
DDC 3.3V Power DDC Clock DDC Data R0~R5,G0 G1~G5,B0,B1 B2~B5,DE,Hsync,Vsync
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Negative Positive Negative Positive Negative Positive Negative Positive
LVDS Level Clock
Note (1) The first pixel is even. Note (2) Connector Part No.: HIROSE DF19L-20P-1H or equivalent Note (3) User's connector Part No: HIROSE DF19G-20S-1C or equivalent
5.2 BACKLIGHT UNIT
Pin 1 2 Symbol HV LV Description High Voltage Ground Color White Black
Note (1) Connector Part No.: JST-BHSR-02VS-1 or equivalent Note (2) User's connector Part No.: JST-SM02B-BHSS-1-TB or equivalent
5.3 TIMING DIAGRAM OF LVDS INPUT SIGNAL
CLK+
T/7
Rxin2
IN20 DE
IN19 Vsync IN12 B0 IN5 R5
IN18 Hsync IN11 G5 IN4 R4
IN17 B5 IN10 G4 IN3 R3
IN16 B4 IN9 G3 IN2 R2
IN15 B3 IN8 G2 IN1 R1
IN14 B2 IN7 G1 IN0 R0
Rxin1
IN13 B1
Rxin0
IN6 G0
Signal for 1 DCLK Cycle (T)
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
5.4 COLOR DATA INPUT ASSIGNMENT The brightness of each primary color (red, green and blue) is based on the 6-bit gray scale data input for the color. The higher the binary input the brighter the color. The table below provides the assignment of color versus data input. Data Signal Red Green Blue R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0 Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 Green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 www..com Basic Blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 Colors Cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 Magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 Yellow 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Red(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Red(1) 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Gray Red(2) 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 Scale : : : : : : : : : : : : : : : : : : : Of : : : : : : : : : : : : : : : : : : : Red Red(61) 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 Red(62) 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 Red(63) 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 Green(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Green(1) 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 Gray Green(2) 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 Scale : : : : : : : : : : : : : : : : : : : Of : : : : : : : : : : : : : : : : : : : Green Green(61) 0 0 0 0 0 0 1 1 1 1 0 1 0 0 0 0 0 0 Green(62) 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 Green(63) 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 Blue(0)/Dark 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Blue(1) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 Gray Blue(2) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 Scale : : : : : : : : : : : : : : : : : : : Of : : : : : : : : : : : : : : : : : : : Blue Blue(61) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 1 Blue(62) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 Blue(63) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 Color Note (1) 0: Low Level Voltage, 1: High Level Voltage
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Version 2.0
Issued Date: Jun. 06, 2005 Model No.: N121X5 -L04
Approval
5.5 EDID DATA STRUCTURE
The EDID (Extended Display Identification Data) data formats are to support displays as defined in the VESA Plug & Display and FPDI standards. Byte # (decimal) 0 1 2 3 www..com4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Byte # (hex) 0 1 2 3 4 5 6 7 8 9 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 Field Name and Comments Header Header Header Header Header Header Header Header EISA ID manufacturer name ("CMO") EISA ID manufacturer name (Compressed ASCII) ID product code (N121X5-L04) ID product code (hex LSB first; N121X5-L04) ID S/N (fixed "0") ID S/N (fixed "0") ID S/N (fixed "0") ID S/N (fixed "0") Week of manufacture (fixed "00H") Year of manufacture (fixed "00H") EDID structure version # ("1") EDID revision # ("3") Video I/P definition ("digital") Max H image size ("24.576 cm") Max V image size ("18.432 cm") Display Gamma (Gamma = "2.2") Feature support ("RGB, preferred timing") Red/Green (Rx1, Rx0, Ry1, Ry0, Gx1, Gx0, Gy1, Gy0) Blue/White (Bx1, Bx0, By1, By0, Wx1, Wx0, Wy1, Wy0) Red-x (Rx = "0.585") Red-y (Ry = "0.335") Green-x (Gx = "0.32") Green-y (Gy = "0.53") Blue-x (Bx = "0.15") Blue-y (By = "0.135") White-x (Wx = "0.313") White-y (Wy = "0.329") Established timings 1 Established timings 2 (1024x768@60Hz) Manufacturer's reserved timings Standard timing ID # 1 Standard timing ID # 1 Standard timing ID # 2 Standard timing ID # 2 Value (hex) 00 FF FF FF FF FF FF 00 0D AF 05 12 00 00 00 00 00 00 01 03 80 19 12 78 0A FE 65 95 55 51 87 26 22 50 54 00 08 00 01 01 01 01 Value (binary) 00000000 11111111 11111111 11111111 11111111 11111111 11111111 00000000 00001101 10101111 00000100 00010010 00000000 00000000 00000000 00000000 00000000 00000000 00000001 00000011 10000000 00011001 00010010 01111000 00001010 11111110 01100101 10010101 01010101 01010001 10000111 00100110 00100010 01010000 01010100 00000000 00001000 00000000 00000001 00000001 00000001 00000001
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Version 2.0
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Byte # (decimal) 42 43 44 45 46 47 48 49 50 www..com 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 Byte # (hex) 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 Value (hex) Standard timing ID # 3 01 Standard timing ID # 3 01 Standard timing ID # 4 01 Standard timing ID # 4 01 Standard timing ID # 5 01 Standard timing ID # 5 01 Standard timing ID # 6 01 Standard timing ID # 6 01 Standard timing ID # 7 01 Standard timing ID # 7 01 Standard timing ID # 8 01 Standard timing ID # 8 01 64 Detailed timing description # 1 Pixel clock ("65 MHz") # 1 Pixel clock (hex LSB first) 19 00 # 1 H active ("1024") 40 # 1 H blank ("320") 41 # 1 H active: H blank ("1024 : 320") 00 # 1 V active ("768") 26 # 1 V blank ("38") 30 # 1 V active: V blank ("768 : 38") 18 # 1 H sync offset ("24") 88 # 1 H sync pulse width ("136") 36 # 1 V sync offset: V sync pulse width ("3 : 6") # 1 H sync offset: H sync pulse width : V sync offset : V sync 00 width ("24 : 136 : 3 : 6") F6 # 1 H image size ("245.76 mm") B8 # 1 V image size ("184.32 mm") 00 # 1 H image size: V image size ("245 : 184") 00 # 1 H boarder ("0") 00 # 1 V boarder ("0") 18 # 1 Flags ("Non-Interlace, Non-Stereo, Digital Separate") Detailed timing description # 2 00 # 2 Flag 00 # 2 Reserved 00 # 2 FE (hex) defines ASCII string (Model Name FE "N121X5-L04", ASCII) # 2 Flag 00 4E # 2 1st character of string ("N") 31 # 2 2nd character of string ("1") 32 # 2 3rd character of string ("2") 31 # 2 4th character of string ("1") 58 # 2 5th character of string ("X") 35 # 2 6th character of string ("5") 2D # 2 7th character of string ("-") 4C # 2 8th character of string ("L") Field Name and Comments # 2 9th character of string ("0") 30 Value (binary) 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 00000001 01100100 00011001 00000000 01000000 01000001 00000000 00100110 00110000 00011000 10001000 00110110 00000000 11110110 10111000 00000000 00000000 00000000 00011000 00000000 00000000 00000000 11111110 00000000 01001110 00110001 00110010 00110001 01011000 00110101 00101101 01001100 00110000
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Byte # (decimal) 86 87 88 89 90 91 92 www..com 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 Byte # (hex) 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Value (hex) 34 # 2 10th character of string ("4") # 2 New line character # 2 indicates end of ASCII string 0A 20 # 2 Padding with "Blank" character 20 # 2 Padding with "Blank" character Detailed timing description # 3 00 # 3 Flag 00 # 3 Reserved 00 FE # 3 FE (hex) defines ASCII string (Vendor"CMO", ASCII) # 3 Flag 00 43 # 3 1st character of string ("C") 4D # 3 2nd character of string ("M") 4F # 3 3rd character of string ("O") # 3 New line character # 3 indicates end of ASCII string 0A 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character 20 # 3 Padding with "Blank" character Detailed timing description # 4 00 # 4 Flag 00 # 4 Reserved 00 # 4 FE (hex) defines ASCII string (Model Name FE "N121X5-L04", ASCII) # 4 Flag 00 4E # 4 1st character of name ("N") 31 # 4 2nd character of name ("1") 32 # 4 3rd character of name ("2") 31 # 4 4th character of name ("1") 58 # 4 5th character of name ("X") 35 # 4 6th character of name ("5") 2D # 4 7th character of name ("-") 4C # 4 8th character of name ("L") 30 # 4 9th character of name ("0") 34 # 4 10th character of name ("4") # 4 New line character # 4 indicates end of Monitor name 0A 20 # 4 Padding with "Blank" character 20 # 4 Padding with "Blank" character Extension flag 00 Checksum BA Field Name and Comments Value (binary) 00110100 00001010 00100000 00100000 00000000 00000000 00000000 11111110 00000000 01000011 01001101 01001111 00001010 00100000 00100000 00100000 00100000 00100000 00100000 00100000 00100000 00100000 00000000 00000000 00000000 11111110 00000000 01001110 00110001 00110010 00110001 01011000 00110101 00101101 01001100 00110000 00110100 00001010 00100000 00100000 00000000 10111010
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5.6 EDID SIGINAL SPECIFICATION
(1) EDID Power Parameter Power supply voltage Symbol Vcc Conditions Read Operation Min. 2.2 Typ. -- Max. 5.5 Unit V
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(2) DC characteristics Symbol SCL, SDA terminal input voltage High Voltage Low Voltage VIH VIL VHYS VOL1 VOL2 ILI Min. 0.7VCC -- 0.05 VCC -- -10 -10 -10 -- -- Max. -- 0.3VCC -- 0.4 0.6 10 50 10 10 3 1 30 100 Unit V V V V IOL=3mA, CC=2.5V IOL=6mA, CC=2.5V WP=VSS WP=VCC Vout =0.1V~VCC, WP=VSS VCC=5.0V Ta=250C, Fclk=1.0MHz VCC=5.5V, SCL=400KHz VCC=3.0V VCC=5.5V Index
Hysteresis Voltage Output Voltage Input Leak current (Vin =0.1V~VCC) Output Leak current Terminal capacity(Input, Output) Operating current Stillness current (SDA=SCL=VCC) (WP=VSS,A0,A1,A2=VSS)
uA
ILO Cin, Cout ICC Write ICC Read
uA pF mA
ICCS
--
uA
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Version 2.0
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(3) AC characteristics (VCC=2.5~5.5V standard operation mode) VCC=2.5V-5.5V (Standard operation mode) Min. Clock frequency Clock High Time Clock Low Time
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Item
Symbol
VCC=4.5V-5.5V (High-speed operation mode) Min. -- 900 1300 -- -- 600 600 0 100 600 100 1300 20 -- -- 1M Max. 400 -- -- 300 300 -- -- -- -- -- 900 -- 250 50 10 -- Unit KHz ns ns ns ns ns ns ns ns ns ns ns ns ns ms cycles Byte and page mode VCC=5.0V Ta=250C, CB100pF Index
Max. 100 -- -- 1000 300 -- -- -- -- -- 3500 -- 250 50 10 --
Fclk THIGH TLOW TR TF THD: STA TSU: STA THD: Data TSU: Data TSU: STO TAA TBUF TOF TSP TWR --
-- 4000 4700 -- -- 4000 4700 0 250 4700 -- 4700 -- -- -- 1M
SDA, SCL falling time SDA, SCL rising time START hold time START setup time Data input hold time Data input setup time STOP setup time Output decision time from a clock Bus free time Rising time of Min VIH, VIL Spike oppression A write-in cycle time The number of times of data rewriting
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6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram. Signal DCLK DE Item Frequency Vertical Total Time Vertical Addressing Time Horizontal Total Time Horizontal Addressing Time Symbol 1/Tc TV TVD TH THD Min. 50 771 768 1200 1024 Typ. 65 806 768 1344 1024 Max. 68 850 768 1500 1024 Unit MHz TH TH Tc Tc Note -
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INPUT SIGNAL TIMING DIAGRAM
Tv TVD DE TH DCLK TC DE THD
DATA
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6.2 POWER ON/OFF SEQUENCE
Power On
90%
Power Off
t7 90% 10%
Restart
t4 10%
- Power Supply for LCD, Vcc
0V
10% t1 t2 t3
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Signal (LVDS Signal of Transmitter), VI
0V
t5
Valid Data
t6
- Power for Lamp
OFF
ON
OFF
Timing Specifications: 0.5 t1 10 msec 0 < t2 50 msec 0 < t3 50 msec t4 500 msec t5 200 msec t6 200 msec Note (1) Please avoid floating state of interface signal at invalid period. Note (2) When the interface signal is invalid, be sure to pull down the power supply of LCD Vcc to 0 V. Note (3) The Backlight inverter power must be turned on after the power supply for the logic and the interface signal is valid. The Backlight inverter power must be turned off before the power supply for the logic and the interface signal is invalid. Note (4) Sometimes some slight noise shows when LCD is turned off (even backlight is already off). To avoid this phenomenon, we suggest that the Vcc falling time had better to follow t7 5 msec
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7. OPTICAL CHARACTERISTICS
7.1 TEST CONDITIONS
Item Ambient Temperature Ambient Humidity Supply Voltage Input Signal Inverter Current Inverter Driving Frequency Inverter Symbol Value Unit o Ta 252 C Ha 5010 %RH VCC 3.3 V According to typical value in "3. ELECTRICAL CHARACTERISTICS" 5.0 IL mA 60 FL KHz Sumida-H05-4915
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The measurement methods of optical characteristics are shown in Section 7.2. The following items
should be measured under the test conditions described in Section 7.1 and stable environment shown in Note (6).
7.2 OPTICAL SPECIFICATIONS
Item Contrast Ratio Response Time Central Luminance of White White Variation of 5 Points Red Color Chromaticity Green Blue White Horizontal Viewing Angle Vertical Symbol CR TR TF LAVE W Rx Ry Gx Gy Bx By Wx Wy x+ xY+ YCondition Min. 350 145 Typ. 500 5 11 175 0.595 0.338 0.320 0.533 0.150 0.135 0.313 0.329 45 45 20 45 Max. 10 16 1.25 Unit ms ms cd/m2 Deg. Note (2), (5) (3) (4), (5) (5), (6)
x=0, Y =0 Viewing Normal Angle TYP -0.03
TYP +0.03
(1)
CR10
40 40 15 40
-
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Note (1) Definition of Viewing Angle (x, y): Normal x = y = 0 yX- = 90
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y+ y+ x+ 12 o'clock direction y+ = 90
xx-
6 o'clock y- = 90
y-
x+
X+ = 90
Note (2) Definition of Contrast Ratio (CR): The contrast ratio can be calculated by the following expression. Contrast Ratio (CR) = L63 / L0 L63: Luminance of gray level 63 L 0: Luminance of gray level 0 CR = CR (5) CR (X) is corresponding to the Contrast Ratio of the point X at Figure in Note (7). Note (3) Definition of Response Time (TR, TF):
100% 90%
Gray Level 63
Gray Level 63
Optical Response Gray Level 0
10% 0%
Time TR TF
66.67 ms
66.67 ms
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Note (4) Definition of Average Luminance of White (LAVE): Measure the luminance of gray level 63 at 5 points LAVE = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5 L (x) is corresponding to the luminance of the point X at Figure in Note (6) Note (5) Measurement Setup: The LCD module should be stabilized at given temperature for 20 minutes to avoid abrupt
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temperature change during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 20 minutes in a windless room.
LCD Module LCD Panel Center of the Screen Photometer (CA210, CS-1000)
Field of View = 2
Light Shield Room (Ambient Luminance < 2 lux)
500 mm
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Note (6) Definition of White Variation (W): Measure the luminance of gray level 63 at 5 points W = Maximum [L (1), L (2), L (3), L (4), L (5)] / Minimum [L (1), L (2), L (3), L (4), L (5)]
Horizontal Line
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D/4
D
D/2 3D/4
Vertical Line
W/4
1 5
2 X
W
W/2
: Test Point X=1 to 5
3W/4
3
4
Active Area
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8. PRECAUTIONS
8.1 HANDLING PRECAUTIONS
(1) The module should be assembled into the system firmly by using every mounting hole. Be careful not to twist or bend the module. (2) While assembling or installing modules, it can only be in the clean area. The dust and oil may cause electrical short or damage the polarizer. (3) Use fingerstalls or soft gloves in order to keep display clean during the incoming inspection and assembly process.
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(4) Do not press or scratch the surface harder than a HB pencil lead on the panel because the polarizer is very soft and easily scratched. (5) If the surface of the polarizer is dirty, please clean it by some absorbent cotton or soft cloth. Do not use Ketone type materials (ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might permanently damage the polarizer due to chemical reaction. (6) Wipe off water droplets or oil immediately. Staining and discoloration may occur if they left on panel for a long time. (7) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth. In case of contacting with hands, legs or clothes, it must be washed away thoroughly with soap. (8) Protect the module from static electricity, it may cause damage to the C-MOS Gate Array IC. (9) Do not disassemble the module. (10) Do not pull or fold the lamp wire. (11) Pins of I/F connector should not be touched directly with bare hands.
8.2 STORAGE PRECAUTIONS
(1) High temperature or humidity may reduce the performance of module. Please store LCD module within the specified storage conditions. (2) It is dangerous that moisture come into or contacted the LCD module, because the moisture may damage LCD module when it is operating. (3) It may reduce the display quality if the ambient temperature is lower than 10 C. For example, the response time will become slowly, and the starting voltage of lamp will be higher than the room temperature.
8.3 OPERATION PRECAUTIONS
(1) Do not pull the I/F connector in or out while the module is operating. (2) Always follow the correct power on/off sequence when LCD module is connecting and operating. This can prevent the CMOS LSI chips from damage during latch-up. (3) The startup voltage of Backlight is approximately 1000 Volts. It may cause electrical shock while assembling with inverter. Do not disassemble the module or insert anything into the Backlight unit.
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9. PACKING
9.1 CARTON
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9.2 PALLET
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10. DEFINITION OF LABELS
10.1 CMO MODULE LABEL
The barcode nameplate is pasted on each module as illustration, and its definitions are as following explanation.
N121X5 N141X5 - L03-L04
01A XXXXXXXYMDLNNNN
E207943
Rev.XX
MADE IN TAIWAN
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CP135448-01
(a) Model Name: N121X5 - L04 (b) Revision: Rev. XX, for example: A1, ..., C1, C2 ...etc. (c) Serial ID: X X X X X X X Y M D X N N N N Serial No. CMO Internal Use Year, Month, Date CMO Internal Use Revision CMO Internal Use Serial ID includes the information as below: (a) Manufactured Date: Year: 1~9, for 2001~2009 Month: 1~9, A~C, for Jan. ~ Dec. Day: 1~9, A~Y, for 1st to 31st, exclude I , O and U (b) Revision Code: cover all the change (c) Serial No.: Manufacturing sequence of product
10.2 CARTON LABEL
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